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Main features:
⚫ 8-bit LC51 CPU
- Compatible with MCS51 instruction set; Dual DPTR; Added software trap instructions.
Improved instruction architecture, with 90 percent of instructions executed in two to four system clock cycles.
⚫ on-chip memory
- 16K+64 bytes FLASH, data retention time is greater than 10 years, write cycle > A thousand times.
- 256-byte EEPROM, data retention time greater than 10 years, write cycle > 10,000 times;
- 512 bytes of RAM.
- Support in System Program



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